Národní úložiště šedé literatury Nalezeno 3 záznamů.  Hledání trvalo 0.01 vteřin. 
Integrated temperature sensor bipolar core
Fránek, Jakub ; Prokop, Roman (oponent) ; Kledrowetz, Vilém (vedoucí práce)
The aim of this thesis is to describe the main possible ways of implementing a smart temperature sensor on a silicon chip in common CMOS process technologies and to design an analog front-end of a bipolar transistor based smart temperature sensor in TSMC 110 process technology. Techniques such as chopping, dynamic element matching or trimming have been utilized to design circuits whose simulated 3 measurement precision is ±3.5 °C untrimmed or ±0.6 °C after single point trim over the military temperature range. The designed circuits occupy as little as 0.012 mm squared of die area and their overall performance is comparable to the current state of the art.
Integrated Temperature Sensor Bipolar Core
Fránek, Jakub
Analog front-end of a bipolar transistor based smart temperature sensor was designed in 110 nm CMOS processing technology TSMC 110 and verified using simulation taking PVT variation into account. The analog front-end of the sensor achieves 3s inaccuracy of +-3.5 °C untrimmed or +-0.7 °C after single point trim over the military temperature range (-55 °C to 125 °C), requiring supply voltage of 2.7-3.63 V, consuming as little as 1μW at 1 S/s and taking up less than 0:012mm2.
Integrated temperature sensor bipolar core
Fránek, Jakub ; Prokop, Roman (oponent) ; Kledrowetz, Vilém (vedoucí práce)
The aim of this thesis is to describe the main possible ways of implementing a smart temperature sensor on a silicon chip in common CMOS process technologies and to design an analog front-end of a bipolar transistor based smart temperature sensor in TSMC 110 process technology. Techniques such as chopping, dynamic element matching or trimming have been utilized to design circuits whose simulated 3 measurement precision is ±3.5 °C untrimmed or ±0.6 °C after single point trim over the military temperature range. The designed circuits occupy as little as 0.012 mm squared of die area and their overall performance is comparable to the current state of the art.

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